-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 24 23:10:29 2024 UTC
-- File 20240524_084243_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-24T08:42:46.000.000.000 to 2024-05-24T08:42:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240524_084243_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  019ECD60 0351ABD0 00F97E30 0085C120 02C721B0 03A4B160 0076E9D0 024D9D30 036B53A0 006F7D30 022C61D0
      022C61D0 013A5130 01A779A0 0374C570 02CEA7C0 03A9F420 007D0E30 00438920 02624DB0 03536B60 027D6F60
      027D6F60 02A1EC60 01F11A50 03099770 028D5CC0 03CBF2A0 002E0BF0 00390E00 00258900 00374D80 002CEB40
      002CEB40 021D4F70 0189F460 034D0E50 00EB8970 009E4DC0 00D16B20 02B9DEB0 03E531E0 0017A910 021C7D90
      021C7D90 01124350 01CDB170 0095B4E0 02DF6E90 01B0D9D0 0368B530 02DCEFA0 01B29870 016BD440 01DE3E60
      01DE3E60 03312150 00A9B1F0 007EB480 0020F760 02308CD0 0128CAB0 01BCAFE0 0362F810 00D38410 02BA4610
      02BA4610 01E76510 0314D790 009EBC50 0168F130 02EE44D0 019966B0 0155D5E0 03FF3F10 0000A090 0200F0D0
      0200F0D0 010088B0 0180CCE0 0340AA90 00E0FFD0 01484010 03F63000 020D2800 030BBC00 028E6200 03C95300
      03C95300 022DFA80 033B07C0 02A68420 01F5C630 010F2520 01C45BD0 01933B10 035AA690 00F7F5D0 028C0F30
      028C0F30 03CA08A0 002F0CF0
     
