-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May 23 23:21:10 2024 UTC
-- File 20240523_165538_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-23T16:55:41.000.000.000 to 2024-05-23T16:55:41.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240523_165538_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  027F2A00 0340BF00 02E0E080 039090C0 0258D8A0 00BA5A70 0073BBA0 01253330 02DBD550 01B63FF0 016D2000
      016D2000 01DBB000 01366800 01AD5C00 017BF200 01C60B00 01250E80 01B789C0 02B62690 02F69AE0 018DD790
      018DD790 034B3C50 00EEA270 0099F340 00D50AE0 02BF8F90 01E04850 03106C70 02985A40 03EA3BB0 030F9330
      030F9330 02885AA0 01CC77F0 012A4C00 01BF6A00 0160DF00 01D0B080 0138E8C0 01A49CA0 0376D2F0 0166DDC0
      0166DDC0 02EAD990 019FB550 03506FF0 02F85800 03847400 02464E00 03656900 02D7DD80 03BC3340 02622AE0
      02622AE0 02A99FC0 03FEA810 0001FC10 02010210 01018310 03814290 0041E3D0 02611230 03519B20 00F956B0
      00F956B0 0085FDE0 03638180 016920A0 03DDB0F0 02336880 032ADCC0 02BFB2A0 01E06BF0 01105E00 01987100
      01987100 01544980 01FE6D40 0280ADF0 01E07D80 01104340 019862E0 03545390 00FE7A50 02814770 03C1E4C0
      03C1E4C0 022116A0 01319DF0 01A95300 00BEFD40 0270C1F0 0348A100 02ECF180 039A8940 0257CDE0 017C2B10
      017C2B10 03C23E90 002321D0
     
