-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May 23 23:13:44 2024 UTC
-- File 20240523_111728_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-23T11:17:31.000.000.000 to 2024-05-23T11:17:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240523_111728_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01E79220 018A2D90 03A79DA0 003A29B0 02139EB0 038D28F0 024BBC80 036E62C0 02D953A0 01B5FA70 016F0740
      016F0740 01D884E0 0334C690 00AEA5D0 02F9F730 03C28650 0011E2B0 001913E0 02159A10 011F5710 0390FC90
      0390FC90 005882D0 0274C3B0 034EA260 00E9F350 029D0AF0 01E9C7C0 028E9210 01C9DB10 032D3690 00BBADD0
      00BBADD0 02E67B30 039546A0 005FE5F0 00701700 00481C80 006C12C0 022D0DD0 009DC590 02D32750 01BAB4F0
      01BAB4F0 0167EE80 01D419C0 013E1520 03A11FB0 02719060 01495850 03EDF470 010D8720 01C5A250 03277370
      03277370 02B4CAC0 03EEAFA0 0019F870 00150440 001F8660 02104550 011867F0 01945400 00AF3F00 007C5040
      007C5040 00427860 02634450 0152E670 01FB9540 01065FE0 03857010 0047C810 02642C10 01563A10 03FE9380
      03FE9380 0100ED20 03809BB0 0240D660 0160BD50 03D0E3F0 02389200 0324DB00 02B6B680 03EDEDC0 021B1B20
      021B1B20 008B4B50 01677770 01D4CCC0 013EAAA0 03A1FFF0 02710000 03498000 02ED4000 039BE000 02561000
      02561000 037D1800 0161CA00
     
