-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon May 20 02:07:11 2024 UTC
-- File 20240520_014901_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-20T01:49:04.000.000.000 to 2024-05-20T01:49:04.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240520_014901_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03D8A0D0 0034F0B0 002E88E0 0239CC90 01252AD0 03B7BFB0 026C6060 015A5050 03F77870 020CC440 030AA660
      030AA660 008FF550 02C80FF0 01D60400 009E8300 00D1C280 00B923C0 00E5B220 02976B30 03DCDEA0 0032B1F0
      0032B1F0 002BE900 003E1D80 00211340 0218CD70 018A55E0 034F7F10 00E8C090 029CA0D0 01D2F0B0 013B88E0
      013B88E0 03A64C90 00756AD0 024FDFB0 03683060 026E1420 00AC8F10 02FAC890 0187ACD0 03447AB0 02E647E0
      02E647E0 01956410 035FD610 00F03D10 02882390 01CC3250 019515B0 02AFCFB0 03F82860 00043C50 02062270
      02062270 03053340 0287AAE0 01C47F90 03264050 00B56070 00EFD040 024C1C30 03B50910 006F8D90 02584B50
      02584B50 01746EF0 01CE5980 01297540 01BDCFE0 03632810 00D2BC10 02BBE210 02F30980 01C546A0 0327E5F0
      0327E5F0 02B41700 03EE1C80 021912C0 03159BA0 009F5670 00D0FD40 00B883E0 02E4C210 02CB5180 01D77CA0
      01D77CA0 033CC2F0 02A2A380 03F3F240 020A0B60 010F0ED0 038889B0 024CCD60 016AABD0 03DFFE30 03180090
      03180090 024A0060 016F0050
     
