-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 19 23:25:10 2024 UTC
-- File 20240519_201050_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-19T20:10:53.000.000.000 to 2024-05-19T20:10:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240519_201050_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  031D0AF0 02938F80 03DA4840 02376C60 012CDA50 03BAB770 0267ECC0 03541AA0 007F0BF0 00204700 00306480
      00306480 002856C0 003C7DA0 02224370 033362C0 02AAD3A0 01FFBA70 01006740 018054E0 03A03F40 03381070
      03381070 02A41840 03F61460 000D1E50 020B9170 030E59C0 02897520 01CDCFB0 012B2860 03BEBC50 0030F130
      0030F130 021444D0 011E66B0 019155E0 0359FF10 00F50090 028F80D0 01C840B0 012C60E0 03BA5090 006778D0
      006778D0 012A6250 01DFA9B0 01307D60 03A843D0 007C6230 00425320 02637AB0 0352C7E0 00FBA410 02867610
      02867610 01C54D10 0393F5C0 032D0790 00BB8450 02E64670 03956540 025FD7E0 01703C10 03C82210 002C3310
      002C3310 023A2A90 01273FD0 01DA5010 039BBC00 02566200 037D5300 02C3FA80 03A207C0 02730420 014A8630
      014A8630 01EFC520 031827B0 02943460 02EF1720 00CC4E50 02AA6970 03FF5DC0 0200F320 01008AB0 0180CFE0
      0180CFE0 0340A810 00E0FC10 02908210 01D8C310 039A5140 032BBCF0 02BE6280 03E153C0 0211FA20 01190730
      01190730 019584A0 035F46F0
     
