-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 19 23:24:06 2024 UTC
-- File 20240519_192009_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-19T19:20:12.000.000.000 to 2024-05-19T19:20:12.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240519_192009_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03B8A880 0264FCC0 03AB4150 003F70F0 00106440 020C2B30 030A3EA0 008F21F0 00C8B100 00ACE980 00FA9D40
      00FA9D40 0087D3E0 02C43A10 01A62710 03753490 0267D760 02AA1E60 01FF1150 030099F0 0280D500 03C0BF80
      03C0BF80 0220E040 03309060 00A8D850 02FCB470 0382EE40 0321CCB0 03589570 02F4DFC0 038EB020 0049E830
      0049E830 006D1C20 025B9230 03765B20 00CD76B0 00ABCDE0 02FE2B10 02C09F40 03D06870 02385C40 03247260
      03247260 00B64B50 02ED6EF0 039BD980 02563540 037D2FE0 00C3B810 02A26410 02F9AB00 01C2BF40 0123E0E0
      0123E0E0 03B21090 006B18D0 025E94B0 0371DEE0 00C93190 02ADA950 01FB7DF0 0106C300 00C2D140 0251DCF0
      0251DCF0 03793280 02C5ABC0 03A77E20 0074C130 004EA1A0 0269F170 035D09C0 02F38D20 018A4BB0 02A7B730
      02A7B730 03FA3650 00072D70 0004BBC0 0006E620 02059530 03075FA0 0084F070 00C68840 00A5CC60 02F72A50
      02F72A50 00C65FB0 0252B830 037BE420 00C61630 00A51D20 02F793B0 038C5A60 004A7750 026F4CF0 0358EA80
      0358EA80 02F49FC0 03C76810
     
