-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 19 23:16:35 2024 UTC
-- File 20240519_134152_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-19T13:41:55.000.000.000 to 2024-05-19T13:41:55.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240519_134152_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00CD9C40 00AB5260 02FEFB50 018186F0 01414580 01E1E740 011114E0 03999E90 022AA8E0 029FFE40 03E800B0
      03E800B0 030E0070 02890040 03CD8060 002B4050 023EE070 03219040 02B15860 01E9F450 031D0E70 02938940
      02938940 03ED26F0 010DDAC0 018B37A0 034EAC70 02E9FA40 039D0760 005384D0 027A46B0 034765E0 00E4D710
      00E4D710 0296BC90 02EEF160 02CCC4E0 01AAA690 037FF5D0 00C00F30 00A008A0 02F00CF0 03880A80 024C0FC0
      024C0FC0 036A0820 00DF0C30 02584510 02BA33C0 03E72A20 0014BF30 001EE0A0 021190F0 03195880 0295F4C0
      0295F4C0 03DF0EA0 003089F0 0028CD00 001E55C0 0208BF90 010CE050 038A9070 024FD840 03683460 00DC2E50
      00DC2E50 02B23970 03EB25C0 021EB720 0111ECB0 02CC8D70 01D565E0 033FD710 00A03C90 02F022D0 018833B0
      018833B0 014C2A60 03EA3F50 001F20F0 0010B080 0018E8C0 020A4E50 0087B4B0 00C46EE0 02A65990 01F57550
      01F57550 030FCFF0 02882800 03CC3C00 022A2200 033F3300 02A0AA80 01F87FE0 03822000 02433000 0362A800
      0362A800 02D3FC00 03BA0200
     
