-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 19 23:08:47 2024 UTC
-- File 20240519_074641_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-19T07:46:44.000.000.000 to 2024-05-19T07:46:44.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240519_074641_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00D77A90 02BCC7D0 01E2A430 0113F620 039A0D30 02570BA0 017C8E70 01C2C940 0123ADE0 03B27B10 006B4690
      006B4690 025EE5D0 01719730 01C95CA0 032DF2F0 02BB0B80 01F34720 030AE4B0 028F96E0 01C85D90 032C7350
      032C7350 00BA4AF0 00E76F80 0094D840 00DEB460 02B1EE50 00F48CB0 02476570 0364D7C0 02D6BC20 01BDE230
      01BDE230 01631320 03D29AB0 023BD7E0 01263C10 03B52210 006FB310 032C3540 035D17F0 02F39C00 038A5200
      038A5200 024F7B00 0368C680 02DCA5C0 03B2F720 006B8CB0 005E4AE0 02716F90 02A4EC20 00FB4D10 0286EB90
      0286EB90 01C59E50 03275170 02B4F9C0 03EE8520 0019C7B0 00152460 021FB650 01106D70 00CC2DE0 03551D80
      03551D80 02FF9340 03805AE0 00407790 02604C50 01506A70 01F85F40 010470E0 03864890 00456CD0 0133ED50
      0133ED50 01D50DF0 013F8B00 01A04E80 017069C0 01C85D20 032C73B0 02BA4A60 01E76F50 0314D8F0 029EB480
      029EB480 01E8F760 038E4660 00496550 026DD7F0 035B3C00 02F6A200 038DF300 024B0A80 036E8FC0 02D9C820
      02D9C820 01B52C30 02B7DD10
     
