-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 19 23:03:34 2024 UTC
-- File 20240519_034954_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-19T03:49:57.000.000.000 to 2024-05-19T03:49:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240519_034954_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00B1B360 02E96AD0 019DDFB0 01533060 03FAA850 0007FC70 00040240 00060360 020502D0 010783B0 01844260
      01844260 03466350 0072A970 004BFDC0 006E0320 025902B0 037583E0 00CF4210 02A8E310 01FC9290 0302DBD0
      0302DBD0 0083B630 02613690 02A8D6E0 01FCBD90 0302E350 008392F0 00C25B80 00A37640 00F2CD60 028BABD0
      028BABD0 01CE7E30 01294120 01DEF0D0 0198C450 0354A670 02FEF540 03818FE0 00414810 0261EC10 01511A10
      01511A10 03F99710 00055C90 0207F2D0 008205D0 01618390 03D14250 0039E370 002512C0 00379BA0 022C5670
      022C5670 033A7D40 02A743E0 01F4E210 030E9310 0244ED40 03B34DF0 026AEB00 035F9E80 02F051C0 03887920
      03887920 004C45B0 006A6760 025F54D0 0170FEB0 01C881E0 03966080 012EA860 03B9FC50 00650270 00578340
      00578340 007C42E0 02426390 01635250 03D2FB70 023B86C0 032645A0 005AB3B0 023BF530 03260FA0 00B50870
      00B50870 00EF8C40 00984A60 02D46F50 01BE58F0 01617480 01D1CEC0 013929A0 01D2DEB0 029DD8F0 03D33480
      03D33480 023AAEC0 0327F9A0
     
