-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 18 23:21:42 2024 UTC
-- File 20240518_170713_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-18T17:07:16.000.000.000 to 2024-05-18T17:07:16.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240518_170713_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  010CFE00 018A8100 00A7E0C0 027A0850 00A38630 00F24520 028B67B0 03CED460 0029BE50 023D6170 0323D1C0
      0323D1C0 02B23920 01EB25B0 011EB760 03C8F660 021646A0 011D65F0 0193D700 015A3C80 01F722C0 010CB3A0
      010CB3A0 038AEA70 024F9F40 036850E0 00DC7890 03592260 027AD9A0 0147B570 01E46FC0 01165820 039D7430
      039D7430 0253CE20 017A2930 01C73DA0 0324A370 02B6F2C0 03F6C5D0 0006D390 0205BA50 01076770 0184D4C0
      0184D4C0 0146BEA0 03E5E1F0 02171100 031C9980 0292D540 03DBBFE0 021B3000 018B5400 014EFE00 01E98100
      01E98100 011D4180 0193E140 015A11E0 03F71910 000C9590 020ADF50 010FB0F0 00C43440 02531730 037A9CA0
      037A9CA0 00C7D2F0 00A43B80 00F62640 008D3560 02CBAFD0 01AE7830 01794420 03C5E630 03138A90 024D27E0
      024D27E0 016BB410 03DE6E10 00315910 0229F590 013D0F50 03A388F0 02724C80 034B6AC0 02EEDFA0 00CCD830
      00CCD830 02555A10 017FF710 03C00C90 00200AD0 02300FB0 03280860 00BC0C50 02E20A70 03930F40 025A88E0
      025A88E0 02BBE640 03F30AB0
     
