-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 18 23:20:32 2024 UTC
-- File 20240518_161628_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-18T16:16:31.000.000.000 to 2024-05-18T16:16:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240518_161628_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0175D5E0 03CF3F10 0028A090 023CF0D0 012288B0 01B3CCE0 036A2A90 00DF3FD0 01585010 03FA3C00 02072200
      02072200 0304B300 0286EA80 03C59FC0 02275020 0134F830 01AE8420 0379C630 02C52520 00D3DBD0 015D1B10
      015D1B10 03F39690 000A5DD0 020F7330 0308CAA0 008CAFF0 00CAF800 00AF8400 00F84600 00846500 00632BC0
      00632BC0 02295F10 013DF090 03A308D0 00728CB0 004BCAE0 026E2F90 01593850 03F5A470 020F7640 0308CD60
      0308CD60 024655E0 02B2BF80 03EBE040 021E1060 01111850 03999470 02555E40 037FF160 00C009D0 02A00D30
      02A00D30 03F00BA0 00040730 02030250 01028370 0183C2C0 014223A0 03E33270 0212AB40 031BFEE0 00960190
      00960190 02DD0150 01B381F0 00B52080 0077D860 024C3450 016A2E70 01DF3940 0130A5E0 03A8F710 007C8C90
      007C8C90 0242CAD0 0163AFB0 01D27860 039DA220 0029B990 023D6550 0123D7F0 01B23C00 016B2200 01DEB300
      01DEB300 0131EA80 01A91FC0 017D9020 03C35830 03117A10 024CE380 036A9240 02DFDB60 01B036D0 03682DB0
      03682DB0 02DC3B60 01B226D0
     
