-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 18 23:11:00 2024 UTC
-- File 20240518_085645_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-18T08:56:48.000.000.000 to 2024-05-18T08:56:48.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240518_085645_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00D62450 02BD3670 03E3AD40 02127BE0 011B4610 0396E510 005D9790 0339AE20 0052BC90 033DF160 025184E0
      025184E0 01794690 03C5E5D0 00271730 00349CA0 022ED2F0 0339BB80 02A56640 03F7D560 000C3FD0 01051010
      01051010 03C3CC00 02222A00 03333F00 02AAA080 03FFF0C0 020008A0 01000CF0 01800A80 01400FC0 01E00820
      01E00820 01880610 03A60280 027503C0 034F8220 00E84330 009C62A0 02D253F0 03BB7A00 0266C700 0355A480
      0355A480 02FF76C0 03C066D0 00102AD0 02183FB0 03142060 009E3050 02D12870 03B9BC40 02656260 0157D350
      0157D350 03FC3AF0 02022780 01819A20 01A0AB90 0370FE50 00C88170 00ACC1C0 00FAA120 0287F1B0 03C40960
      03C40960 00260DD0 02350B30 032F8EA0 005C24F0 00391B40 002596E0 02375D90 012CF350 03BA8AF0 0267CF80
      0267CF80 03542840 02FE3C60 01812250 0341B370 0170B560 03E477E0 00164C10 021D6A10 0113DF10 039A3090
      039A3090 005728D0 027CBCB0 0342E2E0 00E39390 02925A50 00EDBBB0 024DB330 036B6AA0 00DEDFF0 00B1B000
      00B1B000 00E96800 009DDC00
     
