-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 18 23:09:23 2024 UTC
-- File 20240518_074908_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-18T07:49:11.000.000.000 to 2024-05-18T07:49:11.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240518_074908_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  039C0090 005200D0 027B00B0 034680E0 00E5C090 029720D0 01DCB0B0 0132E8E0 03AB9C90 007E52D0 02417BB0
      02417BB0 0361C660 00D12550 02B9B7F0 03E56C00 0217DA00 031C3700 01491640 02F6CEB0 038DA9E0 004B7D10
      004B7D10 026EC390 0159A250 03F57370 020FCAC0 03082FA0 008C3870 00CA2440 02579B30 03BE2B50 00613EF0
      00613EF0 0051A180 00797140 0045C9E0 02672D10 0154BB90 03FEE650 00019570 00015FC0 0200F810 02804200
      02804200 03C06300 02205280 03307BC0 02A84620 01FC6530 010257A0 03837C70 0242C240 0363A360 02693960
      02693960 02AED2E0 01F9BB90 03056650 0087D570 00C43FC0 00A62020 02F53030 038FA820 00487C30 006C4220
      006C4220 012D3190 03DDD4A0 00333EF0 002AA180 003FF140 002009E0 02300D10 01280B90 03BC0E50 00620970
      00620970 00530DC0 023D4590 0291F3A0 01D90A70 01358F40 01AF48E0 0378EC90 00C49AD0 02A6D7B0 03F5BC60
      03F5BC60 000F6250 0208D370 01865D60 03A2B9E0 0073E510 024A1790 016F1C50 03D89270 0234DB40 032EB6E0
      032EB6E0 00B9ED90 02E51B50
     
