-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 15 23:28:12 2024 UTC
-- File 20240515_214508_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-15T21:45:11.000.000.000 to 2024-05-15T21:45:11.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240515_214508_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03BABD40 0333F1F0 02AA0900 03FF0D80 02008B40 0300CEE0 0080A990 02C0FD50 01A083F0 0170C200 01C8A300
      01C8A300 00967940 026EA2F0 0359F380 02F50A40 038F8F60 004848D0 026C6CB0 035A5AE0 00F77790 028CCC50
      028CCC50 01CAAA70 0097FFA0 016E0030 01D90020 03358030 02AF4020 01F8E030 01049020 0386D830 0245B420
      0245B420 01676E30 01D4D920 019F5AD0 01A87BD0 037C4630 02C26520 01A357B0 0172FC60 03CB8250 002E4370
      002E4370 003962C0 0025D3A0 02373A70 019653A0 01AEBD30 0179E3A0 03C51270 02279B40 033456E0 00AE7D90
      00AE7D90 02F94350 0185E2F0 01471380 01E49A40 028B6BB0 03E76F30 0214D8A0 011EB4F0 0191EE80 015919C0
      015919C0 01F59520 030F5FB0 0288F060 01CC8850 032ACC70 015FD520 01F81FD0 03041030 02861820 01C51430
      01C51430 01279E20 03B45130 026E79A0 01594570 01F5E7C0 010F1420 01C44F10 03933440 025AAE60 0177F950
      0177F950 03CC05F0 022A0700 033F0480 02A086C0 03F0C5A0 0008A770 000CF4C0 02054750 0083F270 00C20B40
      00C20B40 00A30EE0 02F28990
     
