-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 15 23:07:56 2024 UTC
-- File 20240515_070531_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-15T07:05:34.000.000.000 to 2024-05-15T07:05:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240515_070531_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00A378C0 00F2C4A0 0145D370 01E73AC0 0114A7A0 039EF470 02518E40 03794960 00C5EDD0 02A71B30 03F496A0
      03F496A0 000EDDF0 0004D980 00035AA0 0202F7F0 03038C00 02824A00 03C36F00 0222D880 0333B4C0 02AA6EA0
      02AA6EA0 01FF59F0 0100F500 00C047C0 02503210 01782B10 03C43E90 002621D0 02353130 032FA9A0 00B87D70
      00B87D70 00E443C0 00966220 02DD5330 03D9FD50 001A81F0 0017C100 001C2180 00123140 001B29E0 0216BD10
      0216BD10 011DE390 03931250 005A9B70 0077D6C0 02261ED0 009A88D0 02D7CCB0 03BC2AE0 00623F90 02532050
      02532050 017AB070 01C7E840 01241C60 03B61250 006D1B70 002DCB60 031D9760 00935CD0 02DAF2B0 03B78BE0
      03B78BE0 006C4E10 025A6910 01775D90 03CCF350 002A8AF0 003FCF80 00101420 010C0F10 038A0890 004F0CD0
      004F0CD0 02688AB0 035CCFE0 00F2A810 028BFC10 01CE0210 03290310 00BD8290 0371A1E0 0264B880 0356E4C0
      0356E4C0 02FD96A0 01835DF0 0142F300 01E38A80 01124FC0 019B6820 0356DC30 02FDB220 00C1B590 0350B7A0
      0350B7A0 00F8EC70 00849A40
     
