-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue May 14 23:27:23 2024 UTC
-- File 20240514_205634_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-14T20:56:37.000.000.000 to 2024-05-14T20:56:37.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240514_205634_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03341E00 02AE1100 01FC8CC0 02816550 00E0EBF0 00909E00 00D8D100 00B4B980 00EEE540 009997E0 02D55C10
      02D55C10 01BFF210 03600B10 00D00E90 035C04E0 02790340 034582E0 00E74390 0294E250 01DE9370 0131DAC0
      0131DAC0 01A937A0 037DAC70 02C37A40 03A2C760 0239D260 02929DA0 01DBD370 01363AC0 01AD27A0 037BB470
      037BB470 02C66E40 03A55960 0077F5D0 024C0F30 036A08A0 006F8670 002C22A0 023A33F0 03272A00 02B4BF00
      02B4BF00 03EEE080 021990C0 031558A0 009FF4F0 00D00E80 00B809C0 02720690 02A582E0 01F74390 030CE250
      030CE250 008A9370 00CFDAC0 00A837A0 02FC2C70 03823A40 02432760 0162B4D0 01E9F750 018E8670 0149C540
      0149C540 01ED27E0 031BB410 00966E10 02DD5910 01B3F590 036A0F50 00DF08F0 00B08C80 00746560 03272BE0
      03272BE0 00B4BE10 02EEE110 01999190 03555950 00FFF5F0 00800F00 00C00880 00A00CC0 00F00AA0 014407F0
      014407F0 00F30200 008A8300 00CFC280 00A823C0 00FC3220 02822B30 03C33EA0 0022A1F0 0033F100 002A0980
      002A0980 001F86A0 010822F0
     
