-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue May 14 23:24:26 2024 UTC
-- File 20240514_184120_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-14T18:41:23.000.000.000 to 2024-05-14T18:41:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240514_184120_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0398EEA0 005499F0 003F6A80 0020DFC0 0030B020 0228E830 033C9C20 00A2D230 00F3BB20 028A66B0 03CF55E0
      03CF55E0 0028FF10 031E4040 0348B030 02ECE820 019A9C30 0157D220 03FC3B30 020226A0 010335F0 0182AF00
      0182AF00 0143F880 01E204C0 02898350 00E6A170 0095F1C0 00DF0920 02B08DB0 03E8CB60 001CAED0 0212F9B0
      0212F9B0 031B8560 009647D0 02DD6430 03D9EB10 021A8F40 0317C8E0 009C2C90 02D23AD0 01BB27B0 0166B460
      0166B460 03D5EE50 003F1970 002095C0 0030DF20 01145850 01CF3A30 0128A720 03BCF4B0 02628EE0 0153C990
      0153C990 03FA2D50 00073BF0 0004A600 0006F500 00058F80 0003A420 01013B10 0381A690 004175D0 0261CF30
      0261CF30 035128A0 00F9BCF0 00856280 00C7D3C0 00A43A20 02F62730 03C69A50 0012EBB0 001B9E60 02165150
      02165150 011D79F0 0193C500 015A2780 01F73440 010CAE60 038AF950 004F85F0 00342380 00171920 021C95B0
      021C95B0 0312DF60 009BB0D0 02D668B0 03BD5CE0 0063F290 02520BD0 017B0E30 01C68920 0192E6D0 01ADCAD0
      01ADCAD0 037B2FB0 02C6B860
     
