-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 11 23:27:16 2024 UTC
-- File 20240511_212109_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-11T21:21:12.000.000.000 to 2024-05-11T21:21:12.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240511_212109_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02F13E10 0189A110 03A6B8C0 033AF250 0053C5B0 023D13B0 0391CD30 02592BA0 0175BE70 01CF6140 0128D1E0
      0128D1E0 03BCB910 0062E590 02539750 017A5CF0 01C77280 009265E0 036DAB80 02DB7E40 03B6C160 006DA1D0
      006DA1D0 025B7130 0376C9A0 00CDAD70 00AB7BC0 00FEC620 0281A530 03E0BBD0 00087310 020C4A90 010A6FD0
      010A6FD0 038F5830 0248F420 016C8E30 01DAC920 0337ADB0 02AC7B60 01FA46D0 0183B2D0 01A135D0 0371AF30
      0371AF30 02C978A0 01ADC4F0 017B2680 01C6B5C0 0125EF20 03B718B0 026C94E0 015ADE90 03FBD8E0 02031A40
      02031A40 03029760 0083DCD0 02C232B0 03A32BE0 0072BE10 024BE110 016E1190 03D91950 003595F0 0017AF80
      0017AF80 000E3C20 02092230 030DB320 008B6AB0 00CEDFE0 02A9B010 01FD6810 0303DC10 00823210 02C32B10
      02C32B10 02D15F40 03DCF870 02328440 032BC660 00BE2550 02E137F0 0391AC00 02597A00 0375C700 02CF2480
      02CF2480 03A8B6C0 033E76D0 0050A6D0 0278F5B0 03448F60 00E6C8D0 0295ACB0 03DF7AE0 0030C790 0228A450
      0228A450 013CF670 01A28D40
     
