-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 11 23:26:02 2024 UTC
-- File 20240511_201332_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-11T20:13:35.000.000.000 to 2024-05-11T20:13:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240511_201332_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00321BA0 01158B30 02CFA750 01A874F0 017C4E80 01C269C0 01235D20 03B2F3B0 026B8A60 015E4F50 03F168F0
      03F168F0 0209DC80 01869960 03A2EAE0 00739F90 024A5050 016F7870 01D8C440 0134A660 03AEF550 00798FF0
      00798FF0 00454800 0067EC00 002A0D00 001F85C0 00104720 021864B0 031456E0 009E7D90 02D14350 01B9E2F0
      01B9E2F0 01651380 01D79A40 013C5760 03D13E60 021CD0A0 0112B8F0 019BE480 015616C0 01FD1DA0 03039370
      03039370 02825AC0 03C377A0 0022CC70 0033AA40 02153FB0 038FD030 02483820 016C2430 01DA3620 03372D30
      03372D30 02ACBBA0 01FAE670 01079540 01845FE0 03467010 0272A400 01A5FB00 01770680 01CC85C0 012AC720
      012AC720 03BFA4B0 026076E0 01504D90 03F86B50 00045EF0 00067180 0002A4A0 0101FB70 018106C0 014185A0
      014185A0 03E14770 0211E4C0 031916A0 00959DF0 00DF5300 00B0FA80 00E887C0 024E6210 02B4A980 03EEFD40
      03EEFD40 021983E0 01154210 039FE310 00501290 02781BD0 01441630 01E61D20 031513B0 034FCD30 037415D0
      037415D0 00CE1F30 00A910A0
     
