-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 11 23:07:16 2024 UTC
-- File 20240511_064026_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-11T06:40:29.000.000.000 to 2024-05-11T06:40:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240511_064026_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01CA73E0 032F4A10 025C7780 01B92620 0365B530 02D76FA0 01BCD870 0162B440 01D3EE60 033A1950 00A715F0
      00A715F0 00F49F00 008ED080 0064DC60 032B5920 00BEF5B0 00E18F60 029148D0 01D9ECB0 01351AE0 03AF9790
      03AF9790 00785C50 02447270 03664B40 036AB770 016FF660 03D80D50 00340BF0 002E0E00 00390900 00258D80
      00258D80 00374B40 002CEEE0 023A9990 0127D550 01DA1FF0 009B8800 00D64C00 00BD6A00 00E3DF00 00923080
      00923080 00DB28C0 00B6BCA0 02EDE2F0 039B1380 02569A40 03BEEBB0 0330CF30 02A8A8A0 01FCFCF0 01028280
      01028280 0183C3C0 01422220 03E33330 0212AAA0 011BFFF0 01960000 00AE8000 007CE000 00429000 0063D800
      0063D800 00523400 007B2E00 0046B900 0065E580 00571740 007C9CE0 0242D290 02B1DDE0 02F49980 038ED540
      038ED540 0249BFE0 016D6010 03DBD010 00363810 022D2410 013BB610 03A66D10 00755B90 0327FB20 005A0350
      005A0350 027702F0 034C8380 02EAC240 039FA360 005072D0 02784BB0 03446E60 00E65950 029575F0 01EFE780
      01EFE780 008C0A20 02CA0F30
     
