-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May  8 23:11:42 2024 UTC
-- File 20240508_091953_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-08T09:19:56.000.000.000 to 2024-05-08T09:19:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240508_091953_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0380DD20 0040B3B0 0060EA60 02509F50 0178D0F0 01C4B880 0126E4C0 01B596A0 036F5DF0 02D8F300 03B48A80
      03B48A80 026ECFC0 0359A820 00F57C30 0247E110 01641190 03D61950 003D15F0 00239F00 00325080 002B78C0
      002B78C0 003EC4A0 0221A6F0 03317580 0154E7A0 01FF4A30 0100EF20 038098B0 0240D4E0 0160BE90 03D0E1D0
      03D0E1D0 00389130 0024D9A0 0236B570 032DEFC0 035D8C10 0279A500 03457780 02E7CC40 03942A60 005E3F50
      005E3F50 027120F0 0349B080 02ED68C0 039BDCA0 005632F0 003E95C0 0210EF90 01189850 0394D470 025EBE40
      025EBE40 0371E160 00C911D0 02AD9930 03FB55A0 0006FF70 000580C0 0203A050 00813830 00C1A420 02A17630
      02A17630 03F1CD20 00092BB0 000DBE60 020B6150 010ED1F0 0189B900 014D6580 00F5EBA0 01478F30 01E448A0
      01E448A0 03166CF0 029D5A80 03D3F7C0 023A0C20 01270A30 01B48F20 036EC8B0 02D9ACE0 02DABD40 03DBF1F0
      03DBF1F0 02360900 032D0D80 02BB8B40 03E64EE0 00156990 021FDD50 011033F0 01982A00 01543F00 00FF1040
      00FF1040 02404C30 03606A20
     
