-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue May  7 23:20:57 2024 UTC
-- File 20240507_160822_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-07T16:08:25.000.000.000 to 2024-05-07T16:08:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240507_160822_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005D15D0 02739F30 034A50A0 00EF78F0 0098C480 00D4A6C0 00BEF5A0 02E18F70 039148C0 032CF650 005D46B0
      005D46B0 0239F2F0 03250B80 02B78E40 03EC4960 001A6DD0 02175B30 031CF6A0 00928DF0 00DBCB00 00B62E80
      00B62E80 00769CE0 0326E940 02B59DE0 01EF5310 0318FA90 009487D0 02DEC430 03B1A620 00697530 005DCFA0
      005DCFA0 02732870 01A55E20 01BBF890 036604D0 00D506B0 00BF85E0 02E04710 01906490 035856D0 00F47DB0
      00F47DB0 008E4360 02C962D0 00D6E9D0 015ECE90 03F1A9D0 00097D30 000DC3A0 020B2270 030EB340 0289EAE0
      0289EAE0 01CD1F90 032B9050 00BE5870 0070BA20 01247390 03B64A50 006D6F70 005BD8C0 007634A0 024D2EF0
      024D2EF0 036BB980 02DE6540 03B157E0 0069FC10 032E8100 015CE0C0 01F290A0 030BD8F0 028E3480 03C92EC0
      03C92EC0 022DB9A0 013B6570 01A6D7C0 0175BC20 03CF6230 03146990 024F2EA0 0168B9F0 01DCE500 01329780
      01329780 01ABDC40 017E3260 03C12B50 0021BEF0 00316180 0029D140 021E9CF0 0188E940 014C9DE0 03EAD310
      03EAD310 001FBA90 021067D0
     
