-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue May  7 02:04:24 2024 UTC
-- File 20240507_014543_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-07T01:45:46.000.000.000 to 2024-05-07T01:45:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240507_014543_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  009E96E0 0368EEC0 036E4CD0 006CB550 025AEFF0 03779800 02CC5400 03AA7E00 027F4100 0340E180 02E09140
      02E09140 0390D9E0 0058B510 033A77C0 0353A610 00FA7510 02874F90 01C4E850 03269C70 02B5D240 03EF3B60
      03EF3B60 0018A6D0 0214F5B0 031E8F60 0248E460 02B64B20 01ED6EB0 011BD9E0 03963510 005D2F90 0273B850
      0273B850 014A6470 01EF5640 0118FD60 039483D0 002F6110 031C68C0 02925CA0 01DB72F0 0136CB80 01ADAE40
      01ADAE40 017B7960 03C6C5D0 0025A730 003774A0 022CCEF0 019D54C0 02A9FF50 01FD00F0 01038080 018240C0
      018240C0 014360A0 03E2D0F0 0213B880 031A64C0 029756A0 01DCFDF0 00994180 006AF0A0 025F88F0 03704C80
      03704C80 02C86AC0 03AC5FA0 007A7070 00474840 0064EC60 02569A50 017DD770 00E19E60 0348A8A0 00ECFCF0
      00ECFCF0 009A8280 00D7C3C0 00BC2220 02E23330 03932AA0 005ABFF0 0077E000 004C1000 00350C00 0017C500
      0017C500 001C2780 00123440 001B2E60 0216B950 011DE5F0 01931700 015A9C80 01F7D2C0 010C3BA0 01C51330
      01C51330 0293CD50 01DA2BF0
     
