-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon May  6 23:26:15 2024 UTC
-- File 20240506_200732_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-06T20:07:35.000.000.000 to 2024-05-06T20:07:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240506_200732_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0337E840 02AC1C60 02FD0920 00C1C6D0 015092D0 01FC6DD0 01812D90 0341BB50 00E166F0 0091D580 00D93F40
      00D93F40 00B5A0E0 02EF7090 0198C8D0 0354ACB0 02FEFAE0 02C0C3C0 03D05110 00387990 02244550 013667F0
      013667F0 01AD5400 017BFE00 01C60100 01250180 01B78140 016C41E0 03ED3080 010DD460 038B3E50 004EA170
      004EA170 0069F1C0 005D0920 02738DB0 034A4B60 00EF6ED0 0298D9B0 03D4B560 021F77E0 02886600 03CC5500
      03CC5500 022A7F80 033F4040 02A0E060 01F09050 0308D870 028CB440 03CAEE60 002F9950 011C2AF0 00C91FC0
      00C91FC0 00AD9020 02FB5830 0386F420 00458E30 00674920 0254EDB0 037E9B60 00C1D6D0 02A13DB0 03F8D1B0
      03F8D1B0 03025CB0 028372E0 01C2CB90 0323AE50 00B27970 00EB45C0 009EE720 02D194B0 03B95EE0 0065F190
      0065F190 032B84A0 005F2370 0070B2C0 0048EBA0 026C9E70 035AD140 02F7B9E0 018C6510 034A5790 00EF7C50
      00EF7C50 0298C270 01EA51A0 018FBCB0 014862E0 03EC5390 001A7A50 02174770 031CE4C0 029296A0 01DBDDF0
      01DBDDF0 01363300 01AD2A80
     
