-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May  3 23:19:41 2024 UTC
-- File 20240503_145301_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-03T14:53:04.000.000.000 to 2024-05-03T14:53:04.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240503_145301_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01A8E010 03BE4800 0130B600 00D47680 00BE4DC0 00E16B20 0291DEB0 03D931E0 0035A910 022F7D90 0138C350
      0138C350 03A4A2F0 0276F380 01A6C520 01BAD3D0 0367BA30 02D46720 01BE54B0 01617EE0 03D1C190 00392150
      00392150 0225B1F0 03376900 02ACDD80 01FD59A0 0181FAB0 014107E0 03E18410 00114610 0219E510 01151790
      01151790 039F9C50 00505270 00787B40 004446E0 033332C0 035555D0 00FFFF30 008000A0 02C000F0 03A00080
      03A00080 027000C0 034800A0 00EC00F0 009A0080 00D700C0 025E4050 00B8B030 00E4E820 02969C30 03DDD220
      03DDD220 00333B30 002AA6A0 023FF5F0 03200F00 02B00880 03E80CC0 030E0550 004483F0 0066C200 0055A300
      0055A300 007F7280 0040CBC0 0060AE20 0250F930 037885A0 00C4C770 00A6A4C0 027AFB50 00A3C370 00F222C0
      00F222C0 008B33A0 02CEAA70 03A9FF40 027D00E0 01438090 03E240D0 001360B0 001AD0E0 030BDC40 03471930
      03471930 02E495A0 0196DF70 015DB0C0 01F368A0 030ADCF0 028FB280 03C86BC0 022C5E20 013A7130 02D3A4D0
      02D3A4D0 00DD3B50 02B3A6F0
     
