-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May  2 23:21:14 2024 UTC
-- File 20240502_163636_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-02T16:36:39.000.000.000 to 2024-05-02T16:36:39.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240502_163636_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00528FE0 027BC810 01462C10 03E53A10 0017A710 021C7490 01124ED0 01CDB4D0 0195B750 01AFB670 00BC36A0
      00BC36A0 017116F0 01C99D80 012D5340 01BBFAE0 03660790 00D50450 02BF8670 03E04540 021067E0 01185410
      01185410 03CA3F00 01179040 019C5860 03527450 00FB4E70 0086E940 00C59DE0 02A75310 01F4FA90 030E87D0
      030E87D0 0089C430 02669310 02AAED40 03FF9BE0 00005610 02007D10 01004390 03806250 00405370 00607AC0
      00607AC0 005047A0 02786470 01A22B20 01B99F50 036550F0 02D7F880 03BC04C0 026206A0 015305F0 01FA8700
      01FA8700 0107C480 018426C0 014635A0 01F297B0 0285EE30 03C71920 002495B0 0036DF60 022DB0D0 013B68B0
      013B68B0 01A6DCE0 0375B290 00CF6BD0 02A8DE30 03FE5890 0200BA60 0100E750 038094F0 0240DE80 0360B1C0
      0360B1C0 02D0E920 01B89DB0 0164D360 03D6BAD0 003DE7B0 02118A30 038CA790 004AF450 026F8E70 03584940
      03584940 02F46DE0 018E5B10 03497690 00EDCDD0 029B2B30 03D6BEA0 001EF0F0 0008C440 000CA660 020AF550
      020AF550 010F8FF0 01884800
     
