-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Apr 29 23:18:28 2024 UTC
-- File 20240429_144549_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-29T14:45:52.000.000.000 to 2024-04-29T14:45:52.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240429_144549_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  012B2D50 03BEBBF0 0130F300 00D44540 025F33F0 01B85500 01647F80 01D64040 013D6060 03A3D050 00723870
      00723870 004B2440 006EB660 0259ED50 01751BF0 00E7CB00 004A1740 006F1CE0 02589290 0174DBD0 03CEB630
      03CEB630 0229ED20 013D1BB0 01A39660 03725D50 00CB73F0 00576500 003E6BC0 00215E20 0231F130 032909A0
      032909A0 00BD8D70 00E34BC0 0092EE20 02DB9930 03B655A0 006D7F70 002DE060 031D8820 00934C30 00DAEA20
      00DAEA20 02B79F30 03EC50A0 001A78F0 00174480 001CE6C0 001295A0 021BDF70 018B1860 03A74A20 0074EF30
      0074EF30 004E98A0 0269D4F0 035D3E80 02F3A1C0 038A7120 004F49B0 0068ED60 025C9BD0 00B96B10 0372EF40
      0372EF40 02CB98E0 01AE5490 03797ED0 00C5C1B0 00A72160 02F4B1D0 018EE930 01499DA0 03ED5370 010DFD60
      010DFD60 03C581E0 00274110 0234E190 012E9150 03B9D9F0 02653500 0357AF80 02FC7840 03824460 00436650
      00436650 01316AB0 02D4EFF0 03BE9800 0261D400 03513E00 02F9A100 03857180 0247C940 03642DE0 00D63B10
      00D63B10 02BD2690 02F1DAE0
     
