-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 20 00:50:14 2024 UTC
-- File 20240415_080204_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-15T08:02:07.000.000.000 to 2024-04-15T08:02:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240415_080204_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00148D30 001ECBA0 0211AE70 018CBCA0 01A57170 00BBE4E0 03730B40 03654770 02D7E4C0 03BC16A0 00621DF0
      00621DF0 00531300 007A9A80 0047D7C0 00643C20 02562230 037D3320 0061D550 01289FF0 01BCD000 0162B800
      0162B800 01D3E400 013A1600 01A71D00 01749380 01CEDA40 0129B760 03BD6CD0 0031ED50 01148DF0 019ECB00
      019ECB00 0151AE80 01F979C0 0105C520 038727B0 0244B460 0166EE50 03D59970 023F55C0 03907F90 022C2020
      022C2020 013A3030 01A72820 0374BC30 02CEE220 01A99330 017D5AA0 03C3F7F0 02220C00 03330A00 01554780
      01554780 00FFF220 02800B30 03C00EA0 002009F0 00300D00 00280B80 003C0E40 00220960 02330DD0 012A8B30
      012A8B30 02DFE750 00D80A70 00B40F40 00EE08E0 02990C90 01D58AD0 033F4FB0 02A0E860 01F09C50 0308D270
      0308D270 028CBB40 03E57370 010BE560 038E17D0 00491C30 006D9220 025B5B30 0376F6A0 00CD8DF0 00AB4B00
      00AB4B00 00FEEE80 008199C0 0260AA90 02A87FE0 01FC4010 03026010 00835010 02C2F810 01A38410 03724610
      03724610 00CB6510 02AED790
     
