-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 21:22:15 2024 UTC
-- File 20240408_155524_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-08T15:55:27.000.000.000 to 2024-04-08T15:55:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240408_155524_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E4A050 0196F070 015D8840 01F34C60 030AEA50 008F9F70 00C850C0 00AC78A0 02FA44F0 03876680 0244D5C0
      0244D5C0 0366BF20 00D5E0B0 00BF10E0 02E09890 0190D4D0 0358BEB0 037A70F0 02C74880 03A4ECC0 02769AA0
      02769AA0 014DD7F0 01EB3C00 011EA200 0191F300 01590A80 01F58FC0 0287A410 02E23B00 03932680 025AB5C0
      025AB5C0 0377EF20 00CC18B0 00AA14E0 02FF1E90 018091D0 0340D930 02E0B5A0 00C877B0 02562630 037D3520
      037D3520 00C3AFB0 00A27860 02F34450 018AE670 014F9540 01E85FE0 031C7010 00924810 036DB600 016DB680
      016DB680 01DB6DC0 0136DB20 03ADB6B0 027B6DE0 0146DB10 03E5B690 00176DD0 021CDB30 0312B6A0 004DF6F0
      004DF6F0 003586C0 002F45A0 0238E770 032494C0 02B6DEA0 01EDB1F0 011B6900 0196DD80 015DB340 01F36AE0
      01F36AE0 03856FC0 0323EC10 00B21A10 02EB1710 019E9C90 0351D2D0 00F93BB0 0085A660 02C77550 01A4CFF0
      01A4CFF0 0176A800 00E6FE00 004AC080 006FA0C0 005870A0 027448F0 034E6C80 02E95AC0 039DF7A0 00530C70
      00530C70 007A8A40 0047CF60
     
