-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 16:36:43 2024 UTC
-- File 20240330_160006_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-30T16:00:09.000.000.000 to 2024-03-30T16:00:09.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240330_160006_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  039A8680 0257C5C0 037C2720 00611A50 0128CBB0 02DE5730 03D8BE50 001A70B0 001748E0 021CEC90 01129AD0
      01129AD0 039BD7B0 02563C60 017D2250 03C3B370 02226AC0 03335FA0 00557830 023FE210 01201310 03B01A90
      03B01A90 006817D0 025C1C30 03721220 00CB1B30 00AE96A0 02F9DDF0 03853300 0123D540 02D91FF0 03B59000
      03B59000 026F5800 0358F400 02F48E00 038EC900 0249AD80 036D7B40 02DBC6E0 01B62590 03B69BA0 0036EB30
      0036EB30 002D9EA0 023B51F0 0326F900 02B58580 03EF4740 0218E4E0 01149690 039EDDD0 0051B330 023CB550
      023CB550 009177F0 00D9CC00 00B52A00 00EFBF00 00986080 00D450C0 00BE78A0 02E144F0 0391E680 025915C0
      025915C0 03BACF90 0233D420 012A3E30 01BF2120 0360B1B0 02D0E960 01B89DD0 0364D330 02D6BAA0 01BDE7F0
      01BDE7F0 01631400 00E94F00 004EF440 00698E60 025D4950 0173EDF0 01CA1B00 012F1680 01B89DC0 0164D320
      0164D320 03D6BAB0 023DE7E0 02918A00 01ECA780 011AF440 01978E60 035C4950 00F26DF0 008B5B00 00CEF680
      00CEF680 00A98DC0 00FD4B20
     
