-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 16:36:20 2024 UTC
-- File 20240330_154311_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-30T15:43:14.000.000.000 to 2024-03-30T15:43:14.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240330_154311_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01696DE0 03DDDB10 00333690 022AADD0 013FFB30 01A006A0 01B802F0 00B201C0 02758090 02A7A060 02FA3820
      02FA3820 01872430 0144B620 03E6ED30 02159BA0 011F5670 0190FD40 015883E0 03F4C210 000EA310 0304F940
      0304F940 034342F0 02E2E380 03939240 025A5B60 017776D0 03CCCDB0 022AAB60 013FFED0 03A001B0 02700160
      02700160 02A400E0 02FB0040 03868060 0045C050 02672070 0354B040 02FEE860 01819C50 03415270 02E1FB40
      02E1FB40 039106E0 022CC2C0 039D51D0 0053F930 007A05A0 02470770 036484C0 02D6C6A0 01BDA5F0 01637700
      01637700 01D2CC80 013BAAC0 02D33FD0 00DD5010 02B3F810 01EA0410 031F0610 00908510 02D8C790 01B4A450
      01B4A450 036EF670 02D98D40 03B54BE0 0237F700 01960640 015D0560 03F387D0 000A4430 000F6620 0208D530
      0208D530 030CBFA0 008AE070 00CF9040 00A85860 037E3A20 00609390 0250DA50 0178B770 01C4ECC0 01269AA0
      01269AA0 03B5D7F0 026F3C00 0358A200 02F4F300 038E8A80 0124E7E0 03DB4A00 0236EF00 032D9880 02BB54C0
      02BB54C0 03E6FEA0 001581F0
     
