-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 15:49:38 2024 UTC
-- File 20240329_044620_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-29T04:46:23.000.000.000 to 2024-03-29T04:46:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240329_044620_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  034A81C0 02EFC120 019821B0 01543160 03FE29D0 00013D30 0001A3A0 0100B930 02C072D0 00D025D0 02B83730
      02B83730 03E42CA0 00163AF0 001D2780 0013B440 001A6E60 02175950 011CF5F0 01928F00 00ADE440 027D8B30
      027D8B30 03434EA0 00E2E9F0 00939D00 00DA5380 00B77A40 00ECC760 029AA4D0 01D7F6B0 013C0DE0 03D10580
      03D10580 011CC3A0 0392A270 025BF340 03760AE0 00CD0F90 02AB8850 01FE4C70 01016A40 0181DF60 034130D0
      034130D0 0070D450 01245F30 01B670A0 036D48F0 02DBEC80 03B61AC0 026D17A0 015B9C70 01F65240 010D7B60
      010D7B60 038BC6D0 002712D0 011A4DD0 03976B30 025CDEA0 0172B1F0 01CBE900 012E1D80 01B91340 01659AE0
      01659AE0 03D75790 003CFC50 01114130 02CCF0D0 01AA88B0 017FCCE0 03C02A90 00203FD0 02302030 03283020
      03283020 00BC2830 00E23C20 02932230 03ED5990 020DFAA0 010B07F0 018E8400 0149C600 01ED2500 011BB780
      011BB780 01966C40 015D5A60 03F3F750 000A0CF0 00078540 020223F0 03033200 0282AB00 03C3FE80 022201C0
      022201C0 03330120 00AA81B0
     
