-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 15:41:59 2024 UTC
-- File 20240328_230809_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-28T23:08:12.000.000.000 to 2024-03-28T23:08:12.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240328_230809_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  021E6EE0 01115990 0399F550 00550FF0 007F8800 00404C00 00606A00 00505F00 00787080 004448C0 00666CA0
      00666CA0 012AAD70 00DFFDE0 02B00310 01E80290 031C03D0 00920230 00DB0320 02B682B0 03EDC3E0 001B2210
      001B2210 0216B310 028EF540 03E4C7F0 0216A400 031DF600 02930D00 03DA8B80 0237CE40 032C2960 00BA3DD0
      00BA3DD0 02E72330 0394B2A0 002F75F0 001C6780 00125440 001B7E60 0216C150 011DA1F0 01937100 015AC980
      015AC980 01F7AD40 010C7BE0 038A4610 0227B280 019A35E0 03572F10 00FCB890 0282E4D0 01C396B0 01225DE0
      01225DE0 03B37310 006ACA90 025FAFD0 01707830 02E42210 02CB1980 03AE9540 0279DFE0 01453010 03E7A810
      03E7A810 00147C10 021E4210 01116310 0399D290 00553BD0 013FD310 03D01D40 023813E0 01241A10 03B61710
      03B61710 006D1C90 025B92D0 01765BB0 01CD7660 032BCD50 00BE2BF0 00709F00 00246840 00365C60 022D7250
      022D7250 013BCB70 01A62EC0 017539A0 03CFA570 022877C0 033C4C20 00A26A30 0279AF90 02A2BC20 01F3E230
      01F3E230 010A1320 038F1AB0
     
