-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 14:37:55 2024 UTC
-- File 20240327_000220_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-27T00:02:23.000.000.000 to 2024-03-27T00:02:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240327_000220_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03C37D70 0222C3C0 0333A220 00AA7330 00FF4AA0 014077F0 00F02600 00441A80 00330BE0 022A8E10 013FC910
      013FC910 03A02D90 00703B50 024826F0 036C3580 02DA2F40 03B738E0 006CA490 032D7B60 025DE360 017312D0
      017312D0 03CA9BB0 022FD660 01383D50 03A423F0 02763200 034D2B00 02EBBE80 039E61C0 0328A890 025E7E60
      025E7E60 01714150 03C9E1F0 022D1100 033B9980 02A65540 03F57FE0 000FC010 02082010 010C3010 03C51400
      03C51400 0113CF00 019A2880 01573CC0 01FCA2A0 0302F3F0 02838A00 03C24F00 02236880 0332DCC0 02ABB2A0
      02ABB2A0 00FF35F0 00405780 00607C40 00504260 02786350 014452F0 01E67B80 01154640 019FE560 035017D0
      035017D0 00F81C30 02420910 02B186C0 03E945A0 001DE770 001314C0 001A9EA0 0217D1F0 031C3900 02922580
      02922580 03DB3740 0236ACE0 0296FD40 03EEC1F0 0219A100 03157180 029FC940 03D02DE0 00383B10 02242690
      02242690 013635D0 03AD2F30 027BB8A0 00A33270 007955A0 0245FF70 036700C0 02D480A0 01BEC0F0 0161A080
      0161A080 01D170C0 0139C8A0
     
