-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 14:22:24 2024 UTC
-- File 20240326_124550_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-26T12:45:53.000.000.000 to 2024-03-26T12:45:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240326_124550_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005D6B60 0273DED0 014A31B0 02F794B0 038C5EE0 004A7190 026F4950 0158EDF0 01F49B00 010ED680 0189BDC0
      0189BDC0 014D6320 03EBD2B0 030F1DF0 01444980 01E66D40 01155BE0 039FF610 00500D10 02780B90 01440E50
      01440E50 03E60970 02150DC0 031F8B20 00482750 01361A70 01AD1740 017B9CE0 03C65290 00257BD0 0237C630
      0237C630 032C2520 00BA37B0 00E72C60 0294BA50 00EF73B0 024C6530 036A57A0 00DF7C70 00B0C240 00E8A360
      00E8A360 029CF2D0 01D28BB0 013BCE60 03A62950 00753DF0 0027D180 001A1CA0 021712F0 031C9B80 0292D640
      0292D640 03DBBD60 003663D0 022D5230 033BFB20 00A606B0 00F505E0 0347C380 01721120 03CB19B0 022E9560
      022E9560 0139DFD0 03A53030 0277A820 014C7C30 01EA4220 031F6330 0290D2A0 00EC5DF0 004D3980 006BA540
      006BA540 005E77E0 02714C10 0149EA10 03ED1F10 001B9090 021658D0 011D74B0 0193CEE0 03AD14C0 033DCF50
      033DCF50 00A328F0 00F2BC80 008BE2C0 00CE13A0 02A91A70 03FD9740 02035CE0 0102F290 03838BD0 00212710
      00212710 0318DA40 0294B760
     
