-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 07:54:37 2024 UTC
-- File 20240321_165505_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-21T16:55:08.000.000.000 to 2024-03-21T16:55:08.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240321_165505_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0073A740 004A74E0 026F4E90 0158E9D0 03F49D30 020ED3A0 0109BA70 018D6740 014BD4E0 03F71F40 03064870
      03064870 0142B620 03E3ED30 02121BA0 011B1670 01969D40 015DD3E0 03F33A10 000AA710 020FF490 01080ED0
      01080ED0 01C604D0 01928350 035BC2F0 02F62380 038D3240 024BAB60 016E7ED0 03D941B0 0235E160 012F11D0
      012F11D0 03B89930 03326AD0 0055AFD0 027F7830 0340C420 00E0A630 0090F520 02D88FB0 03B4C860 006EAC50
      006EAC50 0259FA70 03750740 0367C270 016A11A0 03DF1970 023095C0 0328DF20 00BCB0B0 00E2E8E0 02939C90
      02939C90 01DA52D0 03377BB0 02ACC660 02FD52A0 00C1FDF0 00A10300 00F18280 008943C0 00CDE220 02AB1330
      02AB1330 03FE9AA0 0001D7F0 00013C00 0001A200 0000B980 000072A0 02004BF0 03006E00 02805900 03C07580
      03C07580 02204F40 033068E0 00A85C90 02FC72D0 01824BB0 02A1B730 03F8B650 0004ED70 00069BC0 0005D620
      0005D620 02073D30 0304A3A0 0086F270 00C58B40 00A74EE0 02F4E990 02C74EA0 00D274F0 00BB4E80 00E6E9C0
      00E6E9C0 00959D20 02DF53B0
     
