-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 07:50:44 2024 UTC
-- File 20240321_140555_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-21T14:05:58.000.000.000 to 2024-03-21T14:05:58.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240321_140555_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03F74FE0 000CE810 020A9C10 010FD210 03883B10 004C2690 026A35D0 015F2F30 01F0B8A0 0308E4F0 028C9680
      028C9680 03CADDC0 022FB320 009C3550 02D22FF0 03BB3800 0266A400 0355F600 02FF0D00 03808B80 0240CE40
      0240CE40 0360A960 00D0FDD0 015C4190 03F930A0 0005A8F0 00077C80 0004C2C0 0006A3A0 0205F270 03070B40
      03070B40 02848EE0 01C6C990 0325AD50 005BBDF0 003B3180 0026A940 0035FDE0 022F0310 01388290 03A4C3D0
      03A4C3D0 0076A230 004DF320 026B0AB0 035E8FE0 0278E400 01A24B00 01736E80 01CAD9C0 012FB520 03B86FB0
      03B86FB0 02645860 01567450 03FD4E70 0203E940 03021DE0 02418980 01B0A6A0 0368F5F0 02DC8F00 03B2C880
      03B2C880 026BACC0 035E7AA0 00F147F0 0089E400 00CD1600 00AB9D00 007F29C0 02205E90 013071D0 03A84930
      03A84930 027C6DA0 01425B70 01E376C0 0112CDA0 039BAB70 02567EC0 037D41A0 0061F0B0 02288470 033CC640
      033CC640 02A2A560 01F3F7D0 030A0C30 028F0A20 01C88F30 012CC8A0 03BAACF0 0267FA80 01AA03E0 03BF8100
      03BF8100 02604180 03506140
     
