-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 06:55:07 2024 UTC
-- File 20240319_200620_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-19T20:06:23.000.000.000 to 2024-03-19T20:06:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240319_200620_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E000A0 019000F0 01580080 01F400C0 02870050 00E24030 00936020 02DAD030 03B7B820 006C6430 005A5620
      005A5620 02777D30 034CC3A0 00EAA270 009FF340 02680570 01AE03E0 03790210 00C58310 02A74290 01F4E3D0
      01F4E3D0 030E9230 0289DB20 01CD36B0 012BADE0 03BE7B10 0230A340 03947970 025E45C0 03716720 00C9D4B0
      00C9D4B0 00AD3EE0 02FBA190 01867150 034549F0 02E7ED00 03941B80 012F0B20 01DC4750 033264F0 02AB5680
      02AB5680 03FEFDC0 02018320 010142B0 0181E3E0 03411210 00E19B10 02915690 02ECFEE0 02CD40C0 03ABE0A0
      03ABE0A0 007E10F0 00411880 006194C0 00515EA0 0279F1F0 03450900 02E78D80 03944B40 032F3770 015C5660
      015C5660 03F27D50 000B43F0 000EE200 00099300 000D5A80 000BF7C0 000E0C20 02090A30 030D8F20 0045A450
      0045A450 0133BB30 01AA66A0 037F55F0 02C0FF00 03A08080 0270C0C0 0348A0A0 00ECF0F0 009A8880 00D7CCC0
      00D7CCC0 025E1550 00B88FF0 00E4C800 0096AC00 00DDFA00 00B30700 00EA8480 009FC6C0 00D025A0 02B83770
      02B83770 03E42CC0 030B1D50
     
