-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 03:17:26 2024 UTC
-- File 20240312_211732_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-12T21:17:35.000.000.000 to 2024-03-12T21:17:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240312_211732_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  037AA7A0 00C7F470 00A40E40 00F60960 028D0DD0 01CB8B30 012E4EA0 03B969F0 0265DD00 03573380 02FCAA40
      02FCAA40 0382FF60 0221C060 01312050 03A9B070 027D6840 0343DC60 00E23250 02932B70 03DABEC0 0237E1A0
      0237E1A0 012C1170 00DD0CE0 0359C540 02F527E0 018FB410 03486E10 00EC5910 029A7590 01D74F50 033CE8F0
      033CE8F0 02A29C80 03F3D2C0 03051DD0 0043C990 02622D50 01533BF0 01FAA600 0107F500 01840F80 01460840
      01460840 01E50C60 03178A50 009C4F70 00693460 032ED720 00B9BCB0 00E562E0 0297D390 01DC3A50 03322770
      03322770 02AB34C0 03FEAEA0 0001F9F0 00010500 0000C3C0 02005110 01007990 03804550 004067F0 00605400
      00605400 00507E00 00784100 00446180 00665140 005579E0 033FE280 015009E0 03F80D10 00040B90 02060E50
      02060E50 01050970 01878DC0 01444B20 03E66EB0 021559E0 011FF510 03C807C0 03160210 009D0310 02D38290
      02D38290 01BA43D0 03676230 02D4D320 01BEBAB0 0161E7E0 03D11410 00399E10 0312A880 014DFE60 03EB0150
      03EB0150 001E81F0 0011C100
     
