-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 02:48:37 2024 UTC
-- File 20240312_000912_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-12T00:09:15.000.000.000 to 2024-03-12T00:09:15.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240312_000912_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E0F070 03908840 0258CC60 0174AA50 03CEFF70 022980C0 033D40A0 00A3E0F0 00790840 0222C630 0333A520
      0333A520 00AA77B0 00FF4C60 0280EA50 01C09F70 0120D0C0 01B0B8A0 0368E4F0 02DC9680 01D96EE0 039AECC0
      039AECC0 02579AA0 017C57F0 01C27C00 01234200 01B2E300 016B9280 01DE5BC0 01317620 03A9CD30 033E95D0
      033E95D0 0050EF90 02789850 0144D470 01E6BE40 0115E160 039F11D0 00509930 0078D5A0 0244BF70 0366E0C0
      0366E0C0 036AC850 006FD630 00583D20 027423B0 034E3260 00E92B50 029DBEF0 03D36180 023AD140 0327B9E0
      0327B9E0 00B46510 03772BC0 03665F10 00D57090 02BFC8D0 01E02CB0 01103AE0 03982790 00543450 027E2E70
      027E2E70 03413940 02E1A5E0 02C8BB80 01D67320 033D4AB0 02A3EFE0 01F21810 030B1410 008E9E10 02C9D110
      02C9D110 01AD3990 037BA550 00C677F0 0052A600 003DFA80 002307C0 00328420 022BC630 033E2520 00A137B0
      00A137B0 00F1AC60 02897A50 01CDC770 012B24C0 02DF5B50 00D87B70 00B446C0 00EE65A0 02995770 03D5FCC0
      03D5FCC0 023F02A0 012083F0
     
