-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 18 02:40:47 2024 UTC
-- File 20240311_181402_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-03-11T18:14:05.000.000.000 to 2024-03-11T18:14:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240311_181402_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01503B60 03FC1360 02010D60 0280C5E0 02E05380 01C83D20 032C23B0 02BA3260 01E72B50 0314BEF0 029EE180
      029EE180 03D19140 023959E0 0125F510 03B70F90 02364420 0096B310 02DDEA90 01B31FD0 036A9030 02DFD820
      02DFD820 01B03430 01682E20 03DC3930 023225A0 012B3770 00DF5660 03587EA0 00F441F0 008E6100 00C95180
      00C95180 00ADF940 00FB05E0 02868710 01C5C490 032726D0 00B4B5B0 027777B0 03A66630 02755520 014FFFB0
      014FFFB0 01E80060 031C0050 00920070 00DB0040 00B68060 02EDC050 019B2070 00AB5820 017F7A10 03C0C710
      03C0C710 0020A490 0230F6D0 01288DB0 01BCCB60 0362AED0 00D3F9B0 00BA0560 02E707D0 00CA4210 0357B180
      0357B180 02FC6940 03825DE0 00437310 0262CA90 0153AFD0 03FA7830 02074420 0104E630 01869520 01A2EFD0
      01A2EFD0 01B9CC10 03652A10 00D7BF10 02BC6090 01E250D0 031378B0 029AC4E0 01D7A690 033C75D0 00A24F30
      00A24F30 0279B450 00A2B730 00F3ECA0 028A1AF0 03CF1780 02289C40 033CD260 00A2BB50 02F3E6F0 038A1580
      038A1580 024F1F40 03B44870
     
