-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb 25 01:18:38 2024 UTC
-- File 20240224_095250_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-24T09:52:53.000.000.000 to 2024-02-24T09:52:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240224_095250_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005D37C0 0073AC20 024A7A30 036F4720 00D8E4B0 00B496E0 02EEDD90 0199B350 01AAB570 00BFF7E0 02E00C10
      02E00C10 01900A10 03580F10 00F40890 028E0CD0 01C90AB0 012D8FE0 03BB4810 0066EC10 032ACD00 015FD5C0
      015FD5C0 01F03F20 030820B0 028C30E0 01CA2890 032F3CD0 00B8A2B0 00E4F3E0 02968A10 01DDCF10 03999440
      03999440 032AAF30 02BFF8A0 01E004F0 01100680 019805C0 01540720 03FE04B0 020106E0 01018590 03814750
      03814750 0020F270 001845A0 02146770 031E54C0 02917EA0 01D9C1F0 01352100 01AFB180 01786940 01C45DE0
      01C45DE0 03267310 025AA540 03BBFBF0 02660600 03550500 02FF8780 03804440 02406660 01605550 03D07FF0
      03D07FF0 02384000 03246000 015B2800 00FB5E00 0086F100 00C58980 00A74D40 00F4EBE0 028E9E10 01C9D110
      01C9D110 032D3990 00BBA550 02E677F0 01CAA600 0097FA80 00DC07C0 00B20420 02EB0630 039E8520 0051C7B0
      0051C7B0 00792460 0245B650 01676D70 01D4DBC0 029F5B10 02E87B40 039C46E0 00526590 027B5750 0146FCF0
      0146FCF0 01E58280 011743C0
     
