-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Feb 22 00:28:07 2024 UTC
-- File 20240221_052459_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-21T05:25:02.000.000.000 to 2024-02-21T05:25:02.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240221_052459_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01C0A720 0320F4B0 02B08EE0 01E8C990 031CAD50 0092FBF0 00DB8600 00B64500 00ED6780 009BD440 00D63E60
      00D63E60 02BD2150 01E3B1F0 01126900 019B5D80 0156F340 02FEC570 01C0D3E0 0320BA10 00B0E710 02E89490
      02E89490 019CDED0 0352B1B0 02FBE960 01861DD0 03451330 02E79AA0 00CA2BF0 00579F00 007C5080 004278C0
      004278C0 006344A0 0252E6F0 037B9580 02C65F40 03A570E0 0077C890 024C2CD0 00B51D50 0177C9F0 01CC2D00
      01CC2D00 012A3B80 01BF2640 0160B560 03D0EFD0 00389830 0024D420 0236BE30 032DE120 005D88D0 0139A650
      0139A650 03A57570 0277CFC0 034C2820 00EA3C30 009F2220 02D0B330 03B8EAA0 00649FF0 0056D000 003EDC00
      003EDC00 0010D900 0018B580 0014EF40 001E98E0 0211D490 01193ED0 0395A1B0 025F7160 0170C9D0 03C8AD30
      03C8AD30 03167DD0 004EA190 0269F150 015D09F0 01F38D00 010A4B80 018F6E40 0148D960 03ECB5D0 001AEF30
      001AEF30 001798A0 010E2A70 00C49FA0 02A6D070 03F5B840 020F6460 0108D650 038CBD70 024AE3C0 036F9220
      036F9220 00D85B30 00B476A0
     
