-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 10:34:00 2024 UTC
-- File 20231230_043112_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-12-30T04:31:15.000.000.000 to 2023-12-30T04:31:15.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231230_043112_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  015A5450 03F77E70 020CC140 030AA1E0 008FF110 02C80990 01AC0D50 037A0BF0 02C70E00 03A48900 0276CD80
      0276CD80 034DAB40 02EB7EE0 019EC190 0351A150 00F971F0 0042E480 0031CB60 02292ED0 013DB9B0 01A36560
      01A36560 0372D7D0 00CBBC30 00AE6220 02F95330 0385FAA0 004707F0 00324200 0015B180 001F6940 0010DDE0
      0010DDE0 0218B310 0114EA90 039E9FD0 0051D030 00793820 0245A430 03677620 006A6690 032FAAE0 00B87F90
      00B87F90 02E44050 01966070 015D5040 01F3F860 030A0450 008F0670 00C88540 00ACC7E0 037D5200 0161FD80
      0161FD80 01D10340 013982E0 03A54390 0077E250 024C1370 036A1AC0 02DF17A0 01B09C70 0168D240 02EE5DB0
      02EE5DB0 03CCB9B0 022AE560 013F97D0 03A05C30 02707220 01484B30 01EC6EA0 031A59F0 02977500 03DCCF80
      03DCCF80 01195420 01CAFF10 032F8090 00B840D0 02E460B0 039650E0 005D7890 0273C4D0 014A26B0 01EF35E0
      01EF35E0 0318AF10 024A7C40 03B7A130 026C71A0 015A4970 01F76DC0 010CDB20 038AB6B0 024FEDE0 01681B10
      01681B10 03DC1690 00321DD0
     
