-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb  2 14:16:05 2024 UTC
-- File 20231030_164042_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-30T16:40:45.000.000.000 to 2023-10-30T16:40:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231030_164042_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03E264D0 001356B0 001AFDE0 02178310 011C4290 03C931E0 002DA910 023B7D90 0126C350 03B5A2F0 026F7380
      026F7380 0358CA40 02F4AF60 018EF8D0 034984B0 0376A370 0166F960 03D585D0 003F4730 0020E4A0 023096F0
      023096F0 0328DD80 02BCB340 03E2EAE0 00139F90 021A5050 008BBC30 02673110 0154A990 03FEFD50 000183F0
      000183F0 00014200 0001E300 00011280 00019BC0 00015620 0201FD30 038081D0 00206090 023050D0 012878B0
      012878B0 01BC44E0 03626690 00D355D0 02BAFF30 03E780A0 001440F0 001E6080 0008A860 03067E20 00854130
      00854130 00C7E1A0 02A41170 03F619C0 020D1520 010B9FB0 018E5060 03497850 00EDC470 004D9320 0135AD50
      0135AD50 03AF7BF0 0278C600 0344A500 02E6F780 03958C40 025F4A60 0170EF50 03C898F0 022CD480 019D5F60
      019D5F60 03A9F860 007D0450 02438670 03624540 02D367E0 01BAD410 0367BE10 00D46110 02BE5190 01E17950
      01E17950 0188E2F0 00A649C0 00F56D20 028FDBB0 03C83660 002C2D50 023A3BF0 03272600 02B4B500 03EEEF80
      03EEEF80 02199840 038AAA30
     
