-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb  2 13:05:50 2024 UTC
-- File 20231030_103612_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-30T10:36:15.000.000.000 to 2023-10-30T10:36:15.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231030_103612_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01F0A7C0 0108F420 038C8E30 024AC920 016FADB0 01D87B60 033446D0 00AE65B0 00F95760 0285FCD0 00E38150
      00E38150 029241F0 03DB6100 0236D180 032DB940 02BB65E0 01E6D710 0315BC90 009F62D0 02D0D3B0 03DC5D30
      03DC5D30 031939D0 0095A530 00DF77A0 02B0CC70 03E8AA40 021CFF60 011280D0 039BC0B0 025620E0 017D3090
      017D3090 03E1D460 02089F20 010CD0B0 018AB8E0 034FE490 00E816D0 029C1DB0 03D21360 003B1AD0 022697B0
      022697B0 0335DC60 02579920 00BE2AD0 02E13FB0 0391A060 00597050 0275C870 034F2C40 02E8BA60 019CE750
      019CE750 035294F0 02FBDE80 01C318E0 03914A40 0259EF60 017518D0 03CF94B0 02285EE0 013C7190 03A24950
      03A24950 00736DF0 004ADB00 006FB680 002C36E0 031D16C0 02939DA0 01DA5370 01377AC0 01ACC7A0 037AA470
      037AA470 02C7F640 03A40D60 00760BD0 024D0E30 03B5C490 02379360 012C5AD0 03BA77B0 02674C60 0154EA50
      0154EA50 03FE9F70 0201D0C0 030138A0 0081A4F0 00C17680 0050E6E0 033C4AC0 02A26FA0 01F35870 010AF440
      010AF440 018F8E60 03484950
     
