-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb  2 12:18:55 2024 UTC
-- File 20231030_075417_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-30T07:54:20.000.000.000 to 2023-10-30T07:54:20.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231030_075417_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  024A7330 03B7A550 006C77F0 005A4C00 00776A00 004CDF00 006AB080 005FE8C0 00701CA0 024812F0 036C1B80
      036C1B80 016D0B20 01EDC750 031B24F0 0296B680 03DDEDC0 02331B20 012A96B0 01BFDDE0 03603310 00D02A90
      00D02A90 02B83FD0 00F21010 03458C00 02E74A00 0394EF00 025E9880 0371D4C0 02C93EA0 01ADA1F0 017B7100
      017B7100 01C6C980 0125AD40 02DBBDF0 01DB3180 0136A940 01ADFDE0 037B0310 00C68290 02A5C3D0 01F72230
      01F72230 010CB320 038AEAB0 024F9FE0 02B42800 01F71E00 010C9100 018AD980 014FB540 01E86FE0 031C5810
      031C5810 00927410 02DB4E10 01B6E910 036D9D90 026DA9A0 00ADBEB0 00FB61E0 0286D110 01C5B990 03276550
      03276550 00B4D7F0 00EEBC00 0099E200 00D51300 00BF9A80 00702BE0 03241F00 02B61080 03ED18C0 021B94A0
      021B94A0 01165EF0 019D7180 0153C940 01FA2DE0 03073B10 0084A690 03637AE0 026963C0 035DD220 00F33B30
      00F33B30 008AA6A0 02CFF5F0 03A80F00 027C0880 03420CC0 02E30AA0 01928FF0 00ADE400 007D8B00 00434E80
      00434E80 0062E9C0 00539D20
     
