-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Feb  2 11:22:31 2024 UTC
-- File 20231030_050819_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-30T05:08:22.000.000.000 to 2023-10-30T05:08:22.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231030_050819_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  008D5E10 02CBF110 02D704C0 03DE4350 0018B170 000A74E0 020F4E90 0108E9D0 038C9D30 024AD3A0 016FBA70
      016FBA70 01D86740 013454E0 03AE7E90 007941D0 0122F090 03D9C460 00352650 022FB570 03386FC0 02A45820
      02A45820 01F67430 010D4E20 038BE930 024E1DA0 01691370 00EECD60 034CD5E0 00EABF10 029FE090 01D010D0
      01D010D0 033818B0 02A414E0 01F61E90 030D11D0 008B9930 00CE55A0 0154BFB0 02FF7030 0380C820 0040AC30
      0040AC30 0060FA20 02508730 0378C4A0 00C4A6F0 00A6F580 00F58F40 008F48E0 03647640 036B26B0 02DEB5E0
      02DEB5E0 01B1EF10 03691890 00DD94D0 02B35EB0 03EAF1E0 001F8910 02104D90 01186B50 01CA2F70 00979C60
      00979C60 02DC5250 01B27B70 016B46C0 01DEE5A0 03319770 02A95CC0 03FDF2A0 00030BF0 00028E00 0001E480
      0001E480 00008B60 0200CED0 0100A9B0 0180FD60 034083D0 00E0C230 0090A320 02D8F2B0 03B48BE0 006ECE10
      006ECE10 032CD480 015D5F60 03F3F0D0 000A08B0 000F0CE0 02088A90 010CCFD0 038AA830 024FFC20 01680230
      01680230 01DC0320 01990150
     
