-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 11:49:19 2024 UTC
-- File 20231026_002733_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T00:27:36.000.000.000 to 2023-10-26T00:27:36.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_002733_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03BE36D0 00612DB0 0051BB60 033CB360 02517560 02BCE7E0 01E29410 0313DE10 009A3110 02D72990 01BCBD50
      01BCBD50 0362E3F0 02D39200 03BA5B00 02677680 01AA66E0 03BFAAC0 02607FA0 01504070 01F86040 01045060
      01045060 03867850 00454470 0067E640 00541560 027E1FD0 00A08810 03786600 02C45500 03A67F80 02754040
      02754040 034FE060 00E81050 029C1870 03D21440 023B1E60 01269150 01DAECF0 009BCD40 00D62BE0 02BD3E10
      02BD3E10 01E3A110 03127190 009B4950 02D6EDF0 03BD9B00 02635680 0352FDC0 037DC190 026190A0 015158F0
      015158F0 01F9F480 01050EC0 018789A0 03444D70 02E66BC0 03955E20 005FF130 007009A0 012406B0 02DB02F0
      02DB02F0 03B68380 026DC240 035B2360 00F6B2D0 028DEBB0 03CB1E60 002E9150 0239D9F0 03253500 015BD7C0
      015BD7C0 02FB1E10 01869110 0345D990 00E73550 0294AFF0 03DEF800 02318400 03294600 02BDE500 03E31780
      03E31780 01094E20 01C6F490 03258ED0 00B749B0 00ECED60 029A9BD0 01D7D630 013C3D20 03A223B0 02733260
      02733260 014AAB50 01F7FF70
     
