-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 05:51:16 2024 UTC
-- File 20231025_064913_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-25T06:49:16.000.000.000 to 2023-10-25T06:49:16.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231025_064913_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00050A00 00078F00 00044880 00066CC0 00055AA0 0207F7F0 03040C00 02860A00 03C50F00 02278880 03344CC0
      03344CC0 03573550 00FCAFF0 0082F800 00C38400 00A24600 00F36500 008AD780 00CFBC40 00A86260 02FC5350
      02FC5350 00C13D70 0050D1E0 0278B910 0144E590 03E69750 0015DCF0 001F3280 0010ABC0 0018FE20 02148130
      02148130 031EC1A0 0048D0B0 02365C70 032D7240 02BBCB60 01E62ED0 031539B0 029FA560 01D077D0 03384C30
      03384C30 02A46A20 01F65F30 0286B850 00E2F230 00938B20 02DA4EB0 03B769E0 006CDD10 025AB390 0177EA50
      0177EA50 03CC1F70 022A10C0 033F18A0 00504A70 003C37A0 02222C70 03333A40 02AAA760 01FFF4D0 03000EB0
      03000EB0 028009E0 01C00D10 03200B90 00B00E50 017404B0 02E70370 039482C0 025EC3A0 0171A270 01C97340
      01C97340 012DCAE0 03BB2F90 0066B850 0255E470 037F1640 03604EB0 036834F0 02DC2E80 03B239C0 026B2520
      026B2520 015EB7B0 01F1EC60 03091A50 008D9770 00CB5CC0 00AEF2A0 017CC5F0 00E15380 0091FA40 00D90760
      00D90760 02B584D0 01EF46B0
     
